I am trying to add self checking mechanism to another module I am currently verifying.
I am trying to implement an i2c_slave_receive in my tb. I can see the first data and clock transactions after 25 us, therefore, I set the max_wait_scl_change and max_wait_sda_change to 50 us but I’m still getting timeout errors.
This is the error I am getting:
UVVM: *** FAILURE #1 ***
UVVM: 50001 ns I2C BFM
UVVM: await_value(std_logic 1, 0 ns, 50000 ns) => Failed. Timed out after 50000 ns. ‘this is sda = 1 check’
UVVM: Simulator has been paused as requested after 1 FAILURE
UVVM: *** To find the root cause of this alert, step out the HDL calling stack in your simulator. ***
UVVM: *** For example, step out until you reach the call from the test sequencer. ***
Your reply to this matter will be appreciated.
The max_wait_scl_change and max_wait_sda_change timeout values are probably not the ones making the problems in the testbench. The timeout seems to be coming from an await_value() that you have added as a checker inside your testbench sequencer - right? I guess your DUT/module is the I2C master in the test environment and that you are using the VVC as slave to verify its behavior.
For some reason the await_value() in your sequencer times out - do you call the await_value() after sending the VVC command? The await_value() is a blocking time consuming method, thus it will have to be called after the VVC command if both are in the same sequencer, i.e. process.
You are correct, my DUT is the I2C master in the test environment and I’m using the VVC as slave to verify its behavior.
In this case, I’m using VVC simple in order to simply instantiate the i2c_slave_receive procedure in my tb.
Here is a snippet of the code for the i2c_slave_receive procedure within the i2c_bfm_pkg that I am using:
I added a few messages within the procedure for some quick debugging for myself. When my sim fails, the failure reports the msg within the await_value procedure on line 1494 “this is sda = 1 check”.
Within my tb, the scl and sda signals that drive the bfm (ch1_i2c_scl_sig and ch1_i2c_sda_sig) are tied to signals that come out of the DUT. The sda signal that comes out of the DUT is tied to a weak pull-up resistor. Could the weak pull-up signal be the reason that the bfm is giving me issues?
I do not think the weak pull-ups are causing the problems as the await_value() is using the MATCH_STD argument which include weak value levels:
if ((exp = '1' or exp = 'H') and (target /= '1') and (target /= 'H')) then
wait until (target = '1' or target = 'H') for max_time;
elsif ((exp = '0' or exp = 'L') and (target /= '0') and (target /= 'L')) then
wait until (target = '0' or target = 'L') for max_time;
Can you paste your test sequencer code? It would help debugging to see which commands are used and their order of appearance in the sequencer.
Here is my test sequencer code.
Please let me know if you would like more information.
I’m still not able to see why you are getting the timeout…
Could you enable all log messages
enable_log_msg(ALL_MESSAGES); and post the transcript?
I guess this is a debug logging you have added to the BFM - does it state that SDA is ‘U’? Is this the same signal that you are logging in your wave view as well, and does it say ‘1’/‘H’ or ‘0’/‘L’ there at the timeout?