Hello,
I use I2C VCC as a slave in my design that contain a IC Master,
the configuration as follow:
constant GC_I2C_BFM_CONFIG_4_BIT_ADDR : t_i2c_bfm_config := (
enable_10_bits_addressing => false,
master_sda_to_scl => 400 ns,
master_scl_to_sda => 505 ns,
master_stop_condition_hold_time => 505 ns,
max_wait_scl_change => 10 ms,
max_wait_scl_change_severity => failure,
max_wait_sda_change => 10 ms,
max_wait_sda_change_severity => failure,
i2c_bit_time => 1100 ns, – approx. 1 MHz
i2c_bit_time_severity => failure,
acknowledge_severity => failure,
slave_mode_address => “000” & “1001000”,
slave_mode_address_severity => failure,
slave_rw_bit_severity => failure,
reserved_address_severity => warning,
match_strictness => MATCH_EXACT,
id_for_bfm => ID_BFM,
id_for_bfm_wait => ID_BFM_WAIT,
id_for_bfm_poll => ID_BFM_POLL
);
and i use
i2c_slave_transmit(I2C_VVCT, 4,x"DD",“Transmitting a single byte to master”, C_SCOPE);
to write x"DD" in I2C VCC slave,
but the value x"DD" dont transfert tu DUT,??
Thanks
Hi,
Is the VVC instance number 4 correct? Is this the number you used when you instantiated the VVC?
Br,
Marius
hi Marius
thanks for your relpy
yes the number 4 is correct
these is the instantation of I2C_VVC in TH:
– spi VVC
i1_i2c_vvc: entity bitvis_vip_i2c.i2c_vvc
generic map(
GC_INSTANCE_IDX => 4,
GC_MASTER_MODE => FALSE,
GC_I2C_CONFIG => GC_I2C_BFM_CONFIG_4_BIT_ADDR
)
port map(
i2c_vvc_if.scl => sig_I2C_clk,
i2c_vvc_if.sda => sig_I2C_Data
Great.
Are the signal lines driven to a weak high in the harness?
E.g.
sig_I2C_clk <= ´H´;
sig_I2C_Data <= ´H´;
Br,
Marius
