Error using bitvis_vip_gmii

Hi everybody,

I am trying to create a simple project that uses bitvis_vip_gmii. Starting from the UART example, I have created the scripts folder and the tb and th files. Inside this last one I have

i1_gmii_vvc: entity bitvis_vip_gmii.gmii_vvc
generic map(
port map(
gmii_vvc_tx_if => gmii_tx_if,

I am using gmii_tx_if.txd as input to other instance.

Finally, from tb, I am trying to access to the component in two ways:

  1. gmii_write((x"01", x"02"),“Write 2 bytes”, gmii_tx_if); → In this case, I can see all the signal in the simulator but all of them (except clks) are ‘0’.

  2. gmii_write(GMII_VVCT, 0, TX, (x"01", x"02"), “Write 4 to DUT”); → In this case, I obtained the following error:


KERNEL: UVVM: 100.001 ns TB seq.(uvvm)

KERNEL: UVVM: Time out for uvvm cmd [7]: ‘gmii_write(GMII_VVC,0,tx, 2 bytes)’ while waiting for acknowledge from VVC


Moreover if I extend ‘await_completion’ the results continues being the same one.

Could someone give me some indication to help me? I am new on that and I am a bit lost.
Thanks in advance


The correct way to send a command to the VVC is the option 2.
However, you are trying to send a write command to instance 0, but your i1_gmii_vvc has the instance 1, therefore you’re getting that timeout.

Best regards,

Hi Erick,

Yes, now it works!
Thanks :slight_smile: