When developing a feature which uses a I2C Master, I created a testbench which holds my DUT including the I2C master.
At the other side of the I2C bus I connected a vvc I2C slave.
My first experience was that that the I2C_ACK was not driven by the vvc I2C, is this correct?
The slave_mode_address => “0001010000” was set but the vvc slave did not respond.
Is the I2C VVC only monitoring? I expect a true slave that would pull the SDA low, to ACK the cycle.
One I added a separate slave instantiation, a model of a m24aa64 EEProm, the I2C_ACK was set by the m24aa64, not by the vvc_I2C.
Any idea what I did wrong?
Second, I thought the vvc_I2C was able of receiving data and storing it internal as if the vvc_I2C mimics a EEProm.
When first writing, the data is stored and when reading via I2C, the stored data is send back to the master.
However, I couldn’t get that working. Again I had to add the m24aa64 to store the data in an array.
Is this possible with only the vcc_I2C instantiated?
Third, are there examples available of using the vvc_I2C as an EEProm?