This is a new improvement emerging from the current ESA UVVM project. This brand new functionality will allow the use of simple but important assertions in your testbench - or even inside your DUT. The UVVM assertions are heavily inspired by OVL (Accellera Standard OVL V2) - but we have done a lot of work to simplify their usage and integrate them with UVVM.
The UVVM assertions are procedure-based and easy to use. The intention here is to use them as concurrent procedures that can be inserted into your code in a very simple way, wherever you need your assertions. You will find the documentation on uvvm.github.io, and UVVM can be downloaded from GitHub.