How do you code an expected behavior but without exact timing requirements?
To keep it simple, say I want to monitoring a GPIO output signal
With this intended behaviour:
So requirements are:
- When start goes high, at time A, then B needs to be high between 100 and 200 ns.
- One clock cycle later, at time C it needs to drop again
- When dropped it needs to rise again between maximum of 300 ns at time D
- When high again at time D it needs to drop between 400 and 600 ns at time E
This sounds like a really DUT specific behaviour, so I don’t think it makes sense to make general functionality for this in UVVM. If you find a good way to make this general then please submit a pull request.
I think I would have made a dedicated process for this scenario. Initially trigger on rising START (or a correct pulse on START - depending on more detailed requirements) and then follow the requiremens you described and handle exceptions the right way.
I assume the await_value() command in Utility library would be essential here.
Thanks for your answer. Yes it is very specific DUT behavior, and it was not my intension to request special UVVM function for this.
It was more my lack of understanding on how to
- deal with signals that might toggle in a certain window-of-time.
- program the monitor in the test bench to expect a certain sequence of expected values, in this case ‘0’ and ‘1’.
Hope you find a good way to handle this.