How to get two VVC's on a procedure

VVC Framework
1

Hi,

I want to move UVVM code to a package.

I want to create procedures where two (or more) different VVC’s

I have this working for one VVC

<start of file my_pkg.vhd>

...

library bitvis_vip_spi;

use bitvis_vip_spi.vvc_metods_pkg.all;

use bitvis_vip_spi.td_vvc_framework_common_methods_pkg.all;

use bitvis_vip_spi.spi_bfm_pkg.all;

use bitvis_vip_spi.vvc_cmd_pkg.all;

use bitvis_vip_spi.td_target_support_pkg.all;

use bitvis_vip_spi.transaction_pkg.all;

...

procedure my_proc(

    signal VVCT : inout td_vvc_target_record;

    constant VVC_IDX: in integer;

    ...

)

...

<end of file my_pkg.vhd>

This goes fine.

But now I want to add another GPIO VVC to it.

So I added this library to my package and on my interface of the procedure

<start of file my_pkg.vhd>

...

library bitvis_vip_spi;

use bitvis_vip_spi.vvc_metods_pkg.all;

use bitvis_vip_spi.td_vvc_framework_common_methods_pkg.all;

use bitvis_vip_spi.spi_bfm_pkg.all;

use bitvis_vip_spi.vvc_cmd_pkg.all;

use bitvis_vip_spi.td_target_support_pkg.all;

use bitvis_vip_spi.transaction_pkg.all;

library bitvis_vip_gpio;

use bitvis_vip_gpio.vvc_metods_pkg.all;

use bitvis_vip_gpio.td_vvc_framework_common_methods_pkg.all;

use bitvis_vip_gpio.gpio_bfm_pkg.all;

use bitvis_vip_gpio.vvc_cmd_pkg.all;

use bitvis_vip_gpio.td_target_support_pkg.all;

use bitvis_vip_gpio.transaction_pkg.all;

...

procedure my_proc(

    signal VVCT_1 : inout td_vvc_target_record;

    constant VVC_IDX_1: in integer;

    signal VVCT_2 : inout td_vvc_target_record;

    constant VVC_IDX_2: in integer;

    ...

)

...

<end of file my_pkg.vhd>

But in my simulation I now get the error:

Identifier "t_vvc_target_record" is not directly visible.

And then two suggestions are given for the SPI and for the GPIO.

What do I need to do to make this work?

Rgds,

Eric

2

Hi Eric,
The t_vvc_target_record is defined and compiled into each VVC, so I suspect that your simulator see the GPIO and the SPI t_vvc_target_record definitions and do not know which one to use. Depending on what you are trying to do - can you use overloads, where the signatures include explicit types (bitvis_vip_sbi.t_vvc_target_record and bitvis_vip_gpio.t_vvc_target_record)?

Br,
Marius

3

Marius,

Just to let you know that your suggestion fixed this issue.
Thanks!
It is now like:

procedure my_proc(

    signal VVCT_1 : inout bitvis_vip_sbi.td_target_support_pkg.t_vvc_target_record;

    constant VVC_IDX_1: in integer;

    signal VVCT_2 : inout bitvis_vip_gpio.td_target_support_pkg.t_vvc_target_record;

    constant VVC_IDX_2: in integer;

    ...

)
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