Wait_on_bfm_sync_start()... why?

General questions
1

Hello!

Probably a stupid question. As far as I know In a synchronous project Output change\Input sampled on rising edge (or falling edge) of clock cycle. So, every BFM write\read procedure should be star whit a signal delayed-assignment (operator <=)\acquisition (operator :=) and terminate with “wait until rising_edge(clk)”. Buti in ANY bitvis_vip implementation VVC I see the following structure:

wait_on_bfm_sync_start(..);
...
wait_until_bfm_sync_start();
...
wait_on_bfm-sync_exit()

Due to wait_on_bfm_sync_start new data will be imposed on the falling_edge of clock cycle. Of course it works fine in simulation but this is not what happen in the real world.

My question is: what is the correct usage of wait_on_bfm_sync_start()\wait_on_bfm_exit()?

I suspect they are relevant only in conjunction with SYNC_WITH_SETUP_AND_HOLD parameter.

Regards

2

Hi, You syncronize the accesses in one out of two ways: t_alert_level — UVVM documentation

  • Default: Using falling edges - making sure you have enought setup and hold time.
    In the real world you get new data somewhere between the previous and the next rising edge. The falling edge is thus something in the middle, that also allows you to see the accesses more clearly in the wave view.
  • You can also choose to synchronize using setup and hold, but that required you to set up the relevanrt timing parameters in the BFM for that.

Regards
The UVVM team