Typo's(?) in SPI VVC Quick Ref and GPIO Quick Ref

VVC Bitvis VIP SPI
1

Hi,

When I copy the second example of spi_master_transmit_and_receive() in the spi_vvc_QuickRef, the
spi_master_transmit_and_receive(…, RELEASE_LINE_AFTER_TRANSFER, HOLD_LINE_BETWEEN_WORDS, C_SCOPE) , QuestaSim returns : No feasible entries for subprogram

In the GPIO Quick Ref, page 7, chapter 8 Compilation it says GPOI, while it should be GPIO

Rgds,
Eric

2

Hi Erick,
Thank you, we will add fixes and publish in a later release.

Br,
Marius