Configure VVC GPIO as input or as output

VVC Bitvis VIP GPIO
,
1

Hi,

We are experimenting with the GPIO VVC.
We can’t find in the documentation how to configure it as

  • input
  • output
  • input/output

Can you show me where this is specified in the documenation?

We found that apparently in 2018 it should be done like shown on line 75 to 97 in

as shown at the ened here as well.

Is this still the way to do it in this year 2020?
And if so, how would a biderectional then work?
And if this is not yet in the documentation, can this be updated?

Rgds,
Eric

line 75 to 97:
i_ti_uvvm_engine : entity uvvm_vvc_framework.ti_uvvm_engine;

– GPIO as input
i1_gpio_vvc : entity work.gpio_vvc
generic map(
GC_DATA_WIDTH => C_GPIO_WIDTH,
GC_INSTANCE_IDX => 1,
GC_DEFAULT_LINE_VALUE => x"ZZ"
)
port map (
gpio_vvc_if => gpio_1_input
);

– GPIO as output
i2_gpio_vvc : entity work.gpio_vvc
generic map(
GC_DATA_WIDTH => C_GPIO_WIDTH,
GC_INSTANCE_IDX => 2,
GC_DEFAULT_LINE_VALUE => x"00"
)
port map (
gpio_vvc_if => gpio_2_output
);

2

Hi Erick,
That is the correct way of setting up the VVCs. As of now there is no bidirectional support in the GPIO VIP. I will create a ticket and check if we can provide you with a solution.

Best regards,
Marius

3

Hi,

This information will be added in the documentation of the GPIO VVC in the next release.

The gpio_vvc_if can be used as input, output or inout. If the GC_DEFAULT_LINE_VALUE is set to ‘Z’, ‘H’ or ‘L’, the interface can be used as an input, output or inout. If the default is set to ‘1’, ‘0’ or ‘U’, the interface must be used as an output.
When using the interface as inout, the process currently driving the signal (DUT or VVC) must set it to ‘Z’ after it is finished in order to release the interface so that the other process can drive it.

Also an example will be provided in the GPIO VIP testbench.