Scoreboard usage

Hello,

I am planning to explore the functionality of the scoreboard in UVVM

can someone help me to get a quick start on how to use this functionality?

Regards,
Riyaz

I saw an example which is available on the scoreboard folder but it looks like quite complex

and we should have our scoreboard in test harness or test sequencer is an another question

how can I start doing one for my project can someone let me know?

don’t we have any reports generated for the coverage in HTML or TXT format?

Best regards,
Riyaz

You can check out the webinars we made with Aldec and Mentor, showing how the scoreboards work:
UVVM – Advanced VHDL Verification – Made simple
Universal VHDL Verification Methodology (UVVM) – The standardized open source VHDL testbench architecture
Note that Scoreboards can also be used without VVCs, using BFMs only.

– Espen

Hi Espen,

I watched that video, it is quite informative, but i need an example of how to use in my project

I saw one which is available in the scoreboard file but i am not able to understand it well. So i texted here

-Riyaz

Hi Riyaz,
where your scoreboard should be located will depend on what kind of test setup you have, e.g. do you use VVCs or plain BFMs, do you have a model of your DUT in a test harness etc. For test environments using VVCs I would recommend that you use the VVC built-in scoreboar, while test setups that are more simple you can define your own scoreboard in the testbench like this:

  1. include the scoreboard library and package:
    library bitvis_vip_scoreboard;
    use bitvis_vip_scoreboard.generic_sb_support_pkg.all;

  2. define your scoreboard in the testbench architecture (here I use a 8 bits wide SLV scoreboard):
    package my_tb_sb_pkg is new bitvis_vip_scoreboard.generic_sb_pkg
    generic map (t_element => std_logic_vector(7 downto 0),
    element_match => std_match,
    to_string_element => to_string);
    use my_tb_sb_pkg.all;
    shared variable TB_SB : my_tb_sb_pkg.t_generic_sb;

  3. Set the scope for the scoreboard in the beginning of your testbench sequencer, set the default configuration and enable it:
    TB_SB.set_scope("DUT_SB");
    TB_SB.config(C_SB_CONFIG_DEFAULT, "Set config for TB_SB");
    TB_SB.enable("Enabling DUT SB");

  4. From the testbench sequencer add expected data to scoreboard, that is the data you expect to receive from your DUT (v_slv_8_exp is a variable that has the value I expect my DUT to respond with):
    TB_SB.add_expected(v_slv8_exp, "Adding expected data to SB");

  5. Put actual data to scoreboard, that is the actual data that you receive from your DUT. The scoreboard will alert if the received data do not match the expected (v_slv8_actual is a variable with the data received from the DUT by a read command):
    TB_SB.check_received(v_slv8_actual);

  6. At the end of your sequencer, when all expected and actual data has been sent to the SB, you can print the statistics:
    TB_SB.report_counters(VOID);

There are many other commands for the scoreboard, so this is just an extremely light introduction on how to use it in a testbench sequencer, but you can have a look at the “Generic_Scoreboard_QuickRef.pdf” in the bitvis_vip_scoreboard/doc folder and also look at the bitvis_vip_scoreboard/tb/sb_uart_sbi_demo_tb.vhd testbench.

Best regards,
Marius

Hi Marius,

Thank you for your explanation, my requirement is like i have a model which i want to instantiate in my test harness and every output from my DUT and MODEL should get compared in the test harness itself

I don’t want to write my scoreboard in each of my test cases. can i use the above your explanation in the test harness to implement the scoreboard?

Best Regards,
Riyaz

Hi,
I will recommend that you create a testbench package where you define your scoreboard, and also keep all other testbench and test harness related types, constants and helper methods. This package you can then import to your testbench and test harness so that the scoreboard shared variable is available for the model in the test harness, and also for the test sequencer in the testbench.
Your testbench sequencer will have to enable the scoreboard and also call the report_counters(VOID) and the end, while your model will be responsible for adding expected data to the scoreboard. I do not know which method you will be using for reading back data from the dut, but this method will need to add actual data to the scoreboard as well. For each test case you will reuse the testbench package and test harness, so the only thing you will need to do from the testbench sequencer / test case is to enable and present the scoreboard summary.

If you have a look at the bitvis_vip_uart/tb/uvvm_demo_tb/th.vhd you will see that this is a very similar setup as you will have. This demo use the SBI VVC and UART VVC built-in scoreboards, so you will not see those being defined in any packages here (but they are defined in the vvc_methods_pkg.vhd, sbi_vvc.vhd and uart_rx_vvc.vhd in bitvis_vip_sbi/src and bitvis_vip_uart/src). This demo has a model for adding expected data to the SBI_VVC_SB and UART_VVC_SB, while the VVCs are responsible for adding the actual data to the scoreboards after reading data from the DUT.

Best regards,
Marius

Hi Marius,

This is a completely new one when compared to the old files of tb/th .vhd

In my project, i don’t have any transactions in my VVC. it is a simple one, not an extended version

will my VVC work even if i don’t have any transaction info?

Regards,
Riyaz

Hi,
What kind of mechanism do you have to trigger the model? Have you already created the model or do you intend to?
There is not an easy task to convert an old VVC to a version with extended features such as transaction info and scoreboarding. But you can use the VVC generator script in the vvc_framework/script/vvc_generator and generate a new VVC with all the features included and implement your BFM code in the generated code.

Br,
Marius