How to give a read command on a certain address from a SPI slave

VVC Bitvis VIP SPI
1

Hi,

I’m trying to understand the usage of the spi functions.
My SPI slave expects on the MOSI the following data:
RD_WN, ADDR[6:0], DATA[7:0]
With spi_transmit_only I can prepare the data by concatenation into one data word
i.e.
v_data:= SPI_WRITE, WRITE_ADDRESS, WRITE_DATA;
spi_master_transmit_only(VVCT, vvc_instance_idx, v_data, message);

When I use the spi_master_receive_only() I don’t know how

  • to tell it is a READ
  • to give the READ_ADDRESS
  • to collect the data.

I also see in the waveform that MOSI signal is a straight line of ‘0’ for the 16 clock cycles, where I would expect a ‘1’ for READ, and the READ_ADDRESS (if that was possible to specify).

See for example (and ignore the different length of clocks, w.r.t. my example) ST Community where the SDO start to respond after having received the address and read the instruction

When I use the spi_transmit_and_receive_function(VVCT, vvc_instance_idx, v_data, message), it samples already on the first clock the MISO, which is then still undefined.
This, because my slave first needs to receive the correct address, which is after 8 clocks.

So how can I read from my SPI_SLAVE device?

Rgds,
Eric

2

Just to let you know I solved it.
I split the SPI cycle in half, where the first cycle keeps the SS_N low with HOLD_LINE_AFTER_TRANSFER.

So write becomes:

v_data := WRITE & ADDRESS(6:0)
spi_master_transmit_only(VVCT, idx, v_data, msg, HOLD_LINE_AFTER_TRANSFER)
v_data:=DATA(7 downto )
spi_master_transmit_only(VVCT, idx, v_data, msg)

And a complete SPI_READ becomes

v_data := READ & ADDRESS(6:0)
spi_master_transmit_only(VVCT, idx, v_data, msg, HOLD_LINE_AFTER_TRANSFER)
v_data:=DATA(7 downto )
spi_master_receive_only(VVCT, idx, msg)

And then with fetch result (like described in the PDF) to get the result