Changement of C_VVC_CMD_DATA_MAX_LENGTH ended in compiler error

VVC Bitvis VIP SPI
1

Hello community,

I am using the SPI block for a project and have an issue during recompilation in ModelSim.
My word length has a size of 40 bits and I changed this value in the transaction_pkg.vhd

 constant C_VVC_CMD_DATA_MAX_LENGTH   : natural := 40;

I use the example code of the quick sheet and try to “fetch the data”:

spi_slave_receive_only (SPI_VVCT, 1, "Receiving from Peripheral 1", 2, START_TRANSFER_IMMEDIATE, C_SCOPE);
v_cmd_idx := get_last_received_cmd_idx(SPI_VVCT, 1);
await_completion(SPI_VVCT,1, v_cmd_idx, 100 us, "Wait for receive to finish");
fetch_result(SPI_VVCT,1, v_cmd_idx, v_data, "Fetching result from receive operation");

But it is ending with this note in ModelSim:

**###### ../../../         fetch_result(SPI_VVCT,1, v_cmd_idx, v_data, "Fetching result from receive operation");**
**#**
**# ** Error (suppressible): ../../../(2512): (vcom-1272) Length of formal "result" is 40; length of actual is 8.**
**###### ../../../(2739): end architecture tb;**

It seems that there is still somewhere the older value stuck or I have to change somewhere else a constant as well.

Ideas are welcome! :slight_smile:

2

Hi,
Did you also set GC_DATA_WIDTH to 40?

Br,
Marius

3

Hey Marius,
yes I did. I found out that the declaration of the variables is not working properly.

variable v_data : t_vvc_result; -- Result from read

I had to change it as followed and had no problems anymore.

variable v_data : std_logic_vector(39 downto 0);