Check_stable bug?

Utility Library
1

Hi I just got this message from my test bench:
“check_stable() => Failed. Switched from 0 to 0 1.848 ns ago. Expected stable for 420000000 ps”. Switched from 0 to 0 shouldn’t count as unstable, or?

2

Hi,
I agree, this does not look right. Can you post more of the code so we can have a look at what is happening?

Kind regards,
Marius

3

Unfortunately, I cannot due to NDA. But I suspect the following happens:

at time t + delta_0 the signal changes to ‘1’.
at time t + delta_1 the signal changes back to ‘0’.

Even though the signal is never changed in reality, the target’last_event used in check_stable() is updated by the change in the delta cycle. And last_value_string is updated with the value at t + delta_1 which is ‘0’.

4

Hi, is your signal a std_logic? Which simulator are you using?
I do not see how you are able to get equal values as value and last_value should always differ:

procedure check_stable(
signal target : std_logic;
constant stable_req : time;
constant alert_level : t_alert_level;
constant msg : string;
constant scope : string := C_TB_SCOPE_DEFAULT;
constant msg_id : t_msg_id := ID_POS_ACK;
constant msg_id_panel : t_msg_id_panel := shared_msg_id_panel;
constant caller_name : string := “check_stable()”;
constant value_type : string := “std_logic”
) is
constant value_string : string := to_string(target);
constant last_value_string : string := to_string(target’last_value);
constant last_change : time := target’last_event;
constant last_change_string : string := to_string(last_change, ns);
begin
protected_check_counters.increment(CHECK_STABLE);

if (last_change >= stable_req) then
  log(msg_id, caller_name & " => OK. Stable at " & value_string & ". " & add_msg_delimiter(msg), scope, msg_id_panel);
else
  alert(alert_level, caller_name & " => Failed. Switched from " & last_value_string & " to " &
        value_string & " " & last_change_string & " ago. Expected stable for " & to_string(stable_req) & LF & msg, scope);
end if;

end;

Br,
Marius

5

Hi, yes it is a std_logic. The simulator I am currently using is
“Riviera-PRO version 2019.04.134.7332 built for Linux64”.

Best regards,
Christian

6

Hi,
I still belive this is a simulator bug, i.e. current value and last value should not be equal. I will try to see if I can recreate the error you are having.

Br,
Marius

7

Hi Christian,
I’ve tested a check_stable() method with a delta pulse in Riviera-Pro version 2019.04.134.7332 built for Windows, with the following test setup and do not experience the same bug as you:

library IEEE;
use IEEE.std_logic_1164.all;
library uvvm_util;
context uvvm_util.uvvm_util_context;

entity support_tb is
  generic (
    GC_TEST : string := "UVVM"
    );
end entity;

architecture func of support_tb is
  constant C_CLK_PERIOD   : time := 10 ns;
  constant C_SCOPE        : string := "SUPPORT_TB";
  signal delta_pulse      : std_logic := '0';

begin

  p_main: process
  begin
    set_log_file_name(GC_TEST & "_Log.txt");
    set_alert_file_name(GC_TEST & "_Alert.txt");
    set_alert_stop_limit(TB_ERROR,1);

    if GC_TEST = "support_1" then
      wait for 3*C_CLK_PERIOD;
      check_stable(delta_pulse, 3*C_CLK_PERIOD, TB_ERROR, "Check pulse signal stable");
    else
      alert(tb_error, "Unsupported test: " & GC_TEST);
    end if;

    -----------------------------------------------------------------------------
    -- Ending the simulation
    -----------------------------------------------------------------------------
    wait for 1000 ns;             -- to allow some time for completion
    report_alert_counters(FINAL); -- Report final counters and print conclusion for simulation (Success/Fail)
    log(ID_LOG_HDR, "SIMULATION COMPLETED", C_SCOPE);
    -- Finish the simulation
    std.env.stop;
    wait;  -- to stop completely
  end process p_main;


  p_pulser: PROCESS
  begin
    wait for C_CLK_PERIOD;
    gen_pulse(delta_pulse, 0 ns, BLOCKING, "Creating delta pulse");
    wait;
  end process;

end func;


# KERNEL: UVVM: ID_GEN_PULSE                      10.0 ns  TB seq.                        Pulsed to 1 for 0 ps. 'Pulsing a delta_pulse'
# KERNEL: UVVM:
# KERNEL: UVVM: =========================================================================================================================================================================
# KERNEL: UVVM: ***  TB_ERROR #1  ***
# KERNEL: UVVM:            30 ns   TB seq.
# KERNEL: UVVM:                    check_stable() => Failed. Switched from 1 to 0 20 ns ago. Expected stable for 30000 ps
# KERNEL: UVVM:                    Check pulse signal stable
# KERNEL: UVVM:
# KERNEL: UVVM: Simulator has been paused as requested after 1 TB_ERROR
# KERNEL: UVVM: *** To find the root cause of this alert, step out the HDL calling stack in your simulator. ***
# KERNEL: UVVM: *** For example, step out until you reach the call from the test sequencer. ***
# KERNEL: UVVM: =========================================================================================================================================================================

Br,
Marius