Perhaps a naive question:
I am trying to read the result from my SBI VVC with sbi_read() using the following sequence:
sbi_read(SBI_VVCT, 1, x"00", “Reading back value from SBI”, C_SCOPE);
await_completion(SBI_VVCT, 1, 10 us, “Wait for SBI transaction to complete” );
v_cmd_idx := get_last_received_cmd_idx(SBI_VVCT,1);
fetch_result(SBI_VVCT, 1, v_cmd_idx, v_data, “Fetching read-result”);
I have set my SBI VVC with following parameters:
i1_sbi_vvc: entity bitvis_vip_sbi.sbi_vvc
generic map(
GC_INSTANCE_IDX => 1,
GC_ADDR_WIDTH => 8,
GC_DATA_WIDTH => 32
)
However the compiler (modelsim) is coming with:
(vcom-1272) Length of formal “result” is 32; length of actual is 8.
I thought GC_DATA_WIDTH=32 would ensure everything was 32-bit, as far as I can tell from looking at uvvm code, “result” should be what I assigned for GC_DATA_WIDTH,
If I try and suppress this error, the simulation fails catastrophically, I should note that using sbi_check() to do the read works perfectly, what gives?
Hi,
Is it the fetch_value() command that is failing?
If so - are you sure v_data is 32-bit?
Best regards
The UVVM team
It is the fetch_result causing the compilation error. v_data is of type t_vvc_result i.e.
variable v_data : t_vvc_result;
According to the definitions in the vvc cmd package t_vvc_result is a std_logic_vector or length C_VVC_CMD_DATA_MAX_LENGTH which is 32 by default, and will be defined to the size
GC_DATA_WIDTH if specified, so I don’t know where the 8 is coming from. If I define v_data as follows:
variable v_data : std_logic_vector(31 downto 0);
then it works and there is no error.
Hi,
I will look in to this.
Could you tell me what version of UVVM you are using?
Best regards,
Peter
Are you using several different VVCs in your test environment?
As t_vvc_result is defined differently based on what vvc you are using you could try to hierarchically set the type of v_result to the sbi subtype of t_vvc_result.
So instead of;
variable v_data : t_vvc_result;
try
variable v_data : bitvis_vip_sbi.vvc_cmd_pkg.t_vvc_result;
-Peter
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Hi Peter,
Yes I am using an SPI VVC in my testbench as well. So I tried your suggestion and it works, so it must be using t_vvc_result from the other VVC, I will keep that in mind. Thanks for the insight!
mike
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