Axistream_receive does not work

I’ve been coding a testbench for axistream with UVVM Light, my design file was done by using the AXI stream slave generated with Vivado, so I’m just making the testbench using UVVM. I can write data with axistream_write() but when using axistream_read() an overload error appears. If anyone can help me would be greate, the testbench that I’ve doing is shown below:

library IEEE;
use IEEE.std_logic_1164.all;
library uvvm_util;
context uvvm_util.uvvm_util_context;
library STD;
use std.env.all;
use std.textio.all;
use ieee.std_logic_textio.all;
use std.env.finish;
use uvvm_util.axistream_bfm_pkg.all;

entity AxistreamBlock_v1_0_S00_AXIS_tb is

architecture bench of AxistreamBlock_v1_0_S00_AXIS_tb is

component AxistreamBlock_v1_0_S00_AXIS
generic (
C_S_AXIS_TDATA_WIDTH : integer := 32
port (
S_AXIS_ACLK : in std_logic;
S_AXIS_ARESETN: in std_logic;
S_AXIS_TREADY : out std_logic;
S_AXIS_TDATA : in std_logic_vector(C_S_AXIS_TDATA_WIDTH-1 downto 0);
S_AXIS_TSTRB : in std_logic_vector((C_S_AXIS_TDATA_WIDTH/8)-1 downto 0);
S_AXIS_TLAST : in std_logic;
S_AXIS_TVALID : in std_logic
end component;

constant C_S_AXIS_TDATA_WIDTH :integer:=32;
constant C_S_AXIS_TUSER_WIDTH :integer:=1;
constant C_S_AXIS_TVALID_WIDTH :integer:=1;
constant C_S_AXIS_TLAST_WIDTH :integer:=1;
constant C_S_AXIS_TREADY_WIDTH :integer:=1;
constant C_S_AXIS_TID_WIDTH :integer:=1;
constant C_S_AXIS_TDEST_WIDTH :integer:=1;
constant C_CLK_PERIOD : time:= 10 ns;
signal clock_ena : boolean := true;
signal S_AXIS_ACLK : std_logic;
signal S_AXIS_ARESETN : std_logic;
signal S_AXIS_TREADY : std_logic;
signal S_AXIS_TDATA : std_logic_vector(C_S_AXIS_TDATA_WIDTH-1 downto 0);
signal S_AXIS_TSTRB : std_logic_vector((C_S_AXIS_TDATA_WIDTH/8)-1 downto 0);
signal S_AXIS_TLAST : std_logic;
signal S_AXIS_TVALID : std_logic ;

signal axistream_if : t_axistream_if
tdata (C_S_AXIS_TDATA_WIDTH-1 downto 0), – Data. Width is constrained when the procedure is called
tkeep ((C_S_AXIS_TDATA_WIDTH / 8) - 1 downto 0), – One valid-bit per data byte
tuser (C_S_AXIS_TUSER_WIDTH-1 downto 0), – User sideband data
tstrb ((C_S_AXIS_TDATA_WIDTH / 8) - 1 downto 0), – Treated as sideband data by BFM: tstrb does not affect tdata
tid (C_S_AXIS_TID_WIDTH-1 downto 0), – Treated as sideband data by BFM
tdest (C_S_AXIS_TDEST_WIDTH-1 downto 0) – Treated as sideband data by BFM
signal axistream_bfm_config : t_axistream_bfm_config := C_AXISTREAM_BFM_CONFIG_DEFAULT;
– Overloaded version without records
procedure axistream_receive(
variable data_array : inout t_slv_array;
variable data_length : inout natural; – Number of bytes received
variable strb_array : inout t_strb_array;
constant msg : in string;
signal clk : in std_logic

	-- Call the record version
		data_array          => data_array,
		data_length         => data_length,
		strb_array          => strb_array,
		msg                 => msg,
		clk                 => clk);
end procedure axistream_receive;


– Insert values for generic parameters !!
uut: AxistreamBlock_v1_0_S00_AXIS generic map ( C_S_AXIS_TDATA_WIDTH => C_S_AXIS_TDATA_WIDTH )
port map (
S_AXIS_TDATA => axistream_if.tdata,
S_AXIS_TSTRB =>axistream_if.tstrb,
S_AXIS_TVALID => axistream_if.tvalid

clock_generator(S_AXIS_ACLK, clock_ena, C_CLK_PERIOD, “Reloj del AXI Stream”);
gen_pulse(S_AXIS_ARESETN,‘0’, 2*C_CLK_PERIOD, “Pulsed reset-signal - active for 1 T”);

p_sequencer_axistr: process is
variable v_dato : std_logic_vector(C_S_AXIS_TDATA_WIDTH- 1 downto 0);

axistream_if <= init_axistream_if_signals(true, axistream_if.tdata'length, axistream_if.tuser'length, axistream_if.tid'length, axistream_if.tdest'length);
axistream_bfm_config.clock_period <= C_CLK_PERIOD;
axistream_transmit(x"0F0A0C02","Sent Bytes",S_AXIS_ACLK,axistream_if);

axistream_receive(v_dato,"Bytes Recibidos",S_AXIS_ACLK,axistream_if);    


end process;


Can you share the error message/transcript?


Yes the error that I’ve talking about is this:

I think the error is because the axistream_receive() procedure call with those parameters you are using doesn’t exist. You can look in the Quick Reference for more information on the parameters.

I’ve already seen the reference document and the axistream testbench but they were made for UVVM full version and I’m currently using the Light version due to incompatibilities with framework packages. That’s why I’m stuck on it.

Are you talking about the axistream_bfm_QuickRef.pdf? Because this is the documentation for the BFM package which is used in both UVVM light and the full version.

In page 6 you can find the procedure call parameters:
axistream_receive (data_array, data_length, user_array, strb_array, id_array, dest_array, msg, clk, axistream_if, [scope, [msg_id_panel, [config]]])

But you are using:
axistream_receive(v_dato,"Bytes Recibidos",S_AXIS_ACLK,axistream_if);

Yes, I’ve seen that document specially the part of local overloading, I’ve also used axiwrite_receive() with full parameters except userarray and strbarray but the overloading error is still there.

Can you share how you used it with the full parameters? Note that data_array must be of t_slv_array type and all the parameters which are not in brackets must be used.

To: Whoever reading the post
The problem was partially solved, avoid using UVVM Light for advanced comms protocols, in my case I’ve been trying the axistream_receive() with UVVM Light and it still does not work so I decided to move to UVVM full version, once changed, everything was quite simple due to the examples given in the following repository for this version exclusively: UVVM_SUPPLEMENTARY/bitvis_vip_axistream/tb/maintenance_tb at master · UVVM/UVVM_SUPPLEMENTARY · GitHub
Important note: If you are trying to compile UVVM full version on Windows, you MUST do it through Cygwin, I don’t know why but Windows Terminal rejects the compilation.

Hi, UVVM light is a direct copy of the full UVVM at the BFM level. This means that everything works in the same way in UVVM Light as in the full version of UVVM. The only exception - which is a simplification - is that all BFMs and the UVVM Utility library are compiled into the same library.