# Why do we need the sbi\_vvc

**URL:** <https://forum.uvvm.org/t/why-do-we-need-the-sbi-vvc/304>\
**Category:** VVC\
**Tags:** question\
**Created:** [July 28, 2022, 2:57pm UTC](https://forum.uvvm.org/t/why-do-we-need-the-sbi-vvc/304 "2022-07-28T14:57:50Z")\
**Posts on this page:** 2\
**Page:** 1

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**Author:** ![omaima](https://avatars.discourse-cdn.com/v4/letter/o/b782af/32.png) [@omaima](https://forum.uvvm.org/u/omaima)\
**Post date:** [July 28, 2022, 2:57pm UTC](https://forum.uvvm.org/t/why-do-we-need-the-sbi-vvc/304/1 "2022-07-28T14:57:50Z")

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Hello,  
I am a newbie to uvvm .  
I started to learn uvvm with the uart\_vip exemple in github .  
i want to know the role of the sbi\_vvc and if it is obligatory to use it .  
Regards,

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**Author:** ![Marius](https://dub1.discourse-cdn.com/flex017/user_avatar/forum.uvvm.org/marius/32/43_2.png) [@Marius](https://forum.uvvm.org/u/Marius)\
**Post date:** [July 31, 2022, 1:41pm UTC](https://forum.uvvm.org/t/why-do-we-need-the-sbi-vvc/304/2 "2022-07-31T13:41:41Z")

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Hi,  
The SBI (simple bus interface) VVC is a VHDL verification component to use with a SBI interface. You will only need VVCs for the interface that connects to your DUT, i.e. UART VVC for UART interfaces, AXI VVC for AXI interfaces etc.  
You can read about the SBI interface in section 3.1 in the SBI BFM quick reference pdf ([UVVM/sbi\_bfm\_QuickRef.pdf at master · UVVM/UVVM · GitHub](https://github.com/UVVM/UVVM/blob/master/bitvis_vip_sbi/doc/sbi_bfm_QuickRef.pdf))

Br.  
Marius