# UVVM v2 2020.04.20 is release - with a new VIP

**URL:** <https://forum.uvvm.org/t/uvvm-v2-2020-04-20-is-release-with-a-new-vip/48>\
**Category:** Release info\
**Tags:** uvvm, release\
**Created:** [April 21, 2020, 7:02am UTC](https://forum.uvvm.org/t/uvvm-v2-2020-04-20-is-release-with-a-new-vip/48 "2020-04-21T07:02:31Z")\
**Posts on this page:** 1\
**Page:** 1

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**Author:** ![Marius](https://dub1.discourse-cdn.com/flex017/user_avatar/forum.uvvm.org/marius/32/43_2.png) [@Marius](https://forum.uvvm.org/u/Marius)\
**Post date:** [April 21, 2020, 7:02am UTC](https://forum.uvvm.org/t/uvvm-v2-2020-04-20-is-release-with-a-new-vip/48/1 "2020-04-21T07:02:31Z")

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We have release a new version of UVVM:

- added selection of basic or advanced VVC when generating with vvc\_generator.py script
- added more section with transaction info usage to UVVM VVC Framework Essential Mechanisms pdf.
- added Bitvis VIP Spec Cov - a brand new VIP for documenting specification coverage in projects.

and several small improvements. Available now from [GitHub - UVVM/UVVM: UVVM (Universal VHDL Verification Methodology) is a free and Open Source Methodology and Library for very efficient VHDL verification of FPGA and ASIC – resulting also in significant quality improvement. Community forum: https://forum.uvvm.org/ UVVM.org: https://uvvm.org/](https://github.com/UVVM/UVVM)