# Typo's(?) in SPI VVC Quick Ref and GPIO Quick Ref

**URL:** <https://forum.uvvm.org/t/typos-in-spi-vvc-quick-ref-and-gpio-quick-ref/231>\
**Category:** Bitvis VIP SPI\
**Created:** [October 19, 2021, 10:34am UTC](https://forum.uvvm.org/t/typos-in-spi-vvc-quick-ref-and-gpio-quick-ref/231 "2021-10-19T10:34:44Z")\
**Posts on this page:** 2\
**Page:** 1

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**Author:** ![Eric](https://avatars.discourse-cdn.com/v4/letter/e/898d66/32.png) [@Eric](https://forum.uvvm.org/u/Eric)\
**Post date:** [October 19, 2021, 10:34am UTC](https://forum.uvvm.org/t/typos-in-spi-vvc-quick-ref-and-gpio-quick-ref/231/1 "2021-10-19T10:34:44Z")

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Hi,

When I copy the second example of spi\_master\_transmit\_and\_receive() in the spi\_vvc\_QuickRef, the  
spi\_master\_transmit\_and\_receive(…, RELEASE\_LINE\_AFTER\_TRANSFER, HOLD\_LINE\_BETWEEN\_WORDS, C\_SCOPE) , QuestaSim returns : No feasible entries for subprogram

In the GPIO Quick Ref, page 7, chapter 8 Compilation it says GPOI, while it should be GPIO

Rgds,  
Eric

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**Author:** ![Marius](https://dub1.discourse-cdn.com/flex017/user_avatar/forum.uvvm.org/marius/32/43_2.png) [@Marius](https://forum.uvvm.org/u/Marius)\
**Post date:** [October 26, 2021, 4:14am UTC](https://forum.uvvm.org/t/typos-in-spi-vvc-quick-ref-and-gpio-quick-ref/231/2 "2021-10-26T04:14:08Z")

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Hi Erick,  
Thank you, we will add fixes and publish in a later release.

Br,  
Marius